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The 74LS114 is a dual J-K negative-edge-triggered flip-flop in a DIP-14 package, offering versatile synchronous switching, manual reset/set, and low power operation for digital systems. It is ideal for counters, registers, and timing circuits that require high-speed state memory and control.
The 74LS78 is a Dual Negative Edge Triggered J-K Flip-Flop in a DIP-16 package with Preset, Common Clock, and Common Clear inputs. Ideal for use in counters, registers, state machines, and sequential logic systems requiring synchronized state transitions.
UPC4558 / NJM4558D SOP / SMD – Dual Operational Amplifier 
74LS112 DIP Dual J-K Flip-Flop with Preset and Clear 